v4.21.0 (#25)
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@@ -1,5 +1,5 @@
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/**
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* Copyright (c) 2019-2024 Hailo Technologies Ltd. All rights reserved.
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* Copyright (c) 2019-2025 Hailo Technologies Ltd. All rights reserved.
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* Distributed under the MIT license (https://opensource.org/licenses/MIT)
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**/
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/**
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@@ -45,7 +45,7 @@ extern "C" {
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#define CONTEXT_SWITCH_DEFS__PACKED_VDMA_CHANNEL_ID__ENGINE_INDEX_SHIFT (5)
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#define CONTEXT_SWITCH_DEFS__PACKED_VDMA_CHANNEL_ID__SET(dst, engine_index, vdma_channel_index) do { \
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(dst) = (vdma_channel_index) | ((engine_index) << CONTEXT_SWITCH_DEFS__PACKED_VDMA_CHANNEL_ID__ENGINE_INDEX_SHIFT);\
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(dst) = (uint8_t)((vdma_channel_index) | ((engine_index) << CONTEXT_SWITCH_DEFS__PACKED_VDMA_CHANNEL_ID__ENGINE_INDEX_SHIFT));\
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} while (0)
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#define CONTEXT_SWITCH_DEFS__PACKED_VDMA_CHANNEL_ID__READ(src, engine_index, vdma_channel_index) do {\
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@@ -73,7 +73,6 @@ typedef struct {
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uint16_t feature_padding_payload;
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uint32_t buffer_padding_payload;
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uint16_t buffer_padding;
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bool is_periph_calculated_in_hailort;
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bool is_core_hw_padding_config_in_dfc;
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} CONTEXT_SWITCH_DEFS__stream_reg_info_t;
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@@ -382,11 +381,12 @@ typedef struct {
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} CONTEXT_SWITCH_DEFS__activate_ddr_buffer_output_data_t;
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typedef struct {
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CONTEXT_SWITCH_DEFS__stream_reg_info_t stream_reg_info;
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CONTROL_PROTOCOL__host_buffer_info_t host_buffer_info;
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uint16_t batch_size;
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uint8_t packed_vdma_channel_id;
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uint8_t stream_index;
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uint8_t network_index;
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CONTEXT_SWITCH_DEFS__stream_reg_info_t stream_reg_info;
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CONTROL_PROTOCOL__host_buffer_info_t host_buffer_info;
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} CONTEXT_SWITCH_DEFS__activate_cache_output_data_t;
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typedef struct {
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